Abstract

Time-Sensitive Networking (TSN) enables deterministic Ethernet communication through coordi- nated transmission control. While there are dedicated TSN switches and network interface cards, they are rarely available on resource-constrained microcontrollers. In particular, transmit-time-based scheduling approaches such as the Earliest TxTime First (ETF) queuing discipline are typically not supported on embedded platforms. This thesis investigates the feasibility of implementing ETF-like transmit-time scheduling on a microcontroller using Zephyr RTOS. The implementation targets the NXP i.MX RT1062, which provides a precise PTP hardware clock and compare interrupt mechanism but lacks dedicated hardware support for traffic shaping. The proposed solution integrates transmit-time scheduling into the Zephyr networking stack by combining hardware-triggered interrupts with software-based buffer management inside the network driver. Scheduled frames are prepared in advance and transmitted using a PTP compare event to trigger the transmission routine close to the target time, followed by a short busy-wait phase to improve precision. Best-effort traffic is handled through a driver-level guard band to avoid interference with scheduled transmissions. Experimental evaluation shows that, for periodic traffic with fixed inter-packet gaps, the implementa- tion achieves a bounded transmission window of approximately 3 µs. For variable inter-packet gaps, a larger timing spread is observed. The results demonstrate that ETF-like transmit-time scheduling can be realized on a low-cost microcontroller for certain traffic patterns by leveraging existing PTP hardware features.