Master Thesis MSTR-2005-03

BibliographyGattu, Suresh Kumar: Analysis, Design and Implementation of the Bus Functional Model for faster verification of Systems-on-Chip products.
University of Stuttgart, Faculty of Computer Science, Electrical Engineering, and Information Technology, Master Thesis No. 3 (2005).
81 pages, english.

kein Abstract.

Department(s)University of Stuttgart, Institute of Parallel and Distributed Systems, Parallel Systems
Superviser(s)Ryba, PD. Dr. Michael; Klumpp, Markus
Entry dateMarch 3, 2020
   Publ. Computer Science