| Bibliography | Kharatyan, Gurgen: Evaluation of Design Level Parallelism in Embedded Image Processing Architectures for Window-Based Image Processing Algorithms.
University of Stuttgart, Faculty of Computer Science, Electrical Engineering, and Information Technology, Master Thesis No. 3550 (2013).
60 pages, english.
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| CR-Schema | B.2.1 (Arithmetic and Logic Structures, Design Styles)
B.5.1 (Register-Transfer-Level Implementation, Design)
B.5.2 (Register-Transfer-Level Implementation, Design Aids)
B.6.1 (Logic Design, Design Styles)
C.1.2 (Multiple Data Stream Architectures (Multiprocessors))
I.3.1 (Computer Graphics Hardware Architecture)
I.4.3 (Image Processing and Computer Vision Enhancement)
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| Abstract | wurde nicht veröffentlicht
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| Department(s) | University of Stuttgart, Institute of Parallel and Distributed Systems, Parallel Systems
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| Superviser(s) | Klaiber, Michael |
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| Entry date | March 10, 2014 |
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