Jahrgang 2016
Jahrgang 2002
- Schaefer, Lars; Dorsch, Rainer; Wunderlich, Hans-Joachim: RESPIN++ - Deterministic Embedded Test. In: Proceedings of the 7th European Test Workshop (ETW), Korfu, Greece, May 26-29, 2002.
- Virazel, Arnaud; Wunderlich, Hans-Joachim: Power Conscious BIST Approaches. In: 3. VIVA Schwerpunkt-Kolloquium; Chemnitz, Germany; 18. - 19. March 2002.
- Vranken, Harald; Meister, Florian; Wunderlich, Hans-Joachim: Combining Deterministic Logic BIST with Test Point Insertion. In: IEEE Computer Society (Hrsg): Proceedings of the 7th European Test Workshop (ETW'02); Korfu, Greece; May 26-29, 2002.
Jahrgang 2001
- Chiusano, Silvia; di Carlo, Stefano; Prinetto, Paolo; Wunderlich, Hans-Joachim: On Applying the Set Covering Model to Reseeding. In: Proc. of the 4th Conference on Design, Automation and Test in Europe (DATE), Munich, Germany, March 12-16, 2001.
- Dorsch, Rainer; Wunderlich, Hans-Joachim: Tailoring ATPG for Embedded Testing. In: Proceedings of the 32nd IEEE International Test Conference (ITC), Baltimore, MD, October 30-November 1, 2001.
- Dorsch, Rainer; Wunderlich, Hans-Joachim: Reusing Scan Chains for Test Pattern Decompression. In: Proceedings of the 6th European Test Workshop (ETW), Stockholm, Sweden, May 29-June 1, 2001.
- Girard, Patrick; Guiller, Lois; Landrault, Christian; Pravossoudovitch, Serge; Wunderlich, Hans-Joachim: A Modified Clock Scheme for a Low Power BIST Test Pattern Generator. In: Proceedings of the 19th VLSI Test Symposium (VTS), Marina Del Rey, CA, April 29-May 3, 2001.
- Irion, Alexander; Kiefer, Gundolf; Vranken, Harald; Wunderlich, Hans-Joachim: Circuit Partitioning for Efficient Logic BIST Synthesis. In: Proceedings of the 4th Conference on Design, Automation and Test in Europe (DATE'01), Munich, Germany, March 12-16, 2001.
- Kessler, Michael; Kiefer, Gundolf; Leenstra, Jens; Schünemann, Knut; Schwarz, Thomas; Wunderlich, Hans-Joachim: Using a Hierarchical DfT Methodology in High Frequency Processor Designs for Improved Delay Fault Testability. In: Proceedings of the International Test Conference : ITC 2001 ; Baltimore, Maryland, October 30-November 1, 2001.
- Kessler, Michael; Kiefer, Gundolf; Leenstra, Jens; Schuenemann, Knut; Schwarz, Thomas; Wunderlich, Hans-Joachim: Using a Hierarchical DfT Methodology in High Frequency Processor Designs for Improved Delay Fault Testability. In: Proceedings of the 32nd IEEE International Test Conference (ITC), Baltimore, MD, October 30-November 1, 2001.
- Liang, Hua-Guo; Hellebrand, Sybille; Wunderlich, Hans-Joachim: Two-Dimensional Test Data Compression for Scan-Based Deterministic BIST. In: "Proceedings of the 32nd IEEE International Test Conference (ITC), Baltimore, MD, October 30-November 1, 2001.
Jahrgang 2000
- Cataldo, Silvia; Chiusano, Silvia; Prinetto, Paolo; Wunderlich, Hans-Joachim: Optimal Hardware Pattern Generation for Functional BIST. In: Proceedings of the 3rd Conference on Design and Test in Europe (DATE), Paris, France, March 27-30, 2000.
- Chiusano, Silvia; Prinetto, Paolo; Wunderlich, Hans-Joachim: Non-Intrusive BIST for Systems-on-a-Chip. In: Proceedings of the 31st IEEE International Test Conference (ITC), Atlantic City, NJ, October 3-5, 2000.
- Hellebrand, Sybille; Liang, Hua-Guo; Wunderlich, Hans-Joachim: A Mixed Mode BIST Scheme Based on Reseeding of Folding Counters. In: Proceedings of the 31st IEEE International Test Conference (ITC), Atlantic City, NJ, October 3-5, 2000.
- Kiefer, Gundolf; Vranken, Harald; Marinessen, Erik Jan; Wunderlich, Hans-Joachim: Application of Deterministic Logic BIST on Industrial Circuits. In: Proceedings of the 31st IEEE International Test Conference (ITC), Atlantic City, NJ, October 3-5, 200, 2000.
Jahrgang 1999
- Gerstendoerfer, Stefan; Wunderlich, Hans-Joachim: Minimized Power Consumption for Scan-Based BIST. In: Proceedings of the 30th IEEE International Test Conference (ITC), Atlantic City, NJ, September 28-30, 1999.
- Hellebrand, Sybille; Wunderlich, Hans-Joachim; Ivaniuk, Alexander; Klimets, Yuri; Yarmolik, Vyacheslav N.: Error Detecting Refreshment for Embedded DRAMs. In: Proceedings of the 17th IEEE VLSI Test Symposium (VTS), Dana Point, CA, April 25-29, 1999.
- Kiefer, Gundolf; Wunderlich, Hans-Joachim: Deterministic BIST with Partial Scan. In: Proceedings of the 4th IEEE European Test Workshop (ETW), Constance, May 25-28, 1999.
- Yarmolik, Vyacheslav N.; Bykov, I.V.; Hellebrand, Sybille; Wunderlich, Hans-Joachim: Transparent Word-oriented Memory BIST Based on Symmetric March Algorithms. In: Proceedings of the 3rd European Dependable Computing Conference (EDCC), Prague, Czech Republic, September 15-17, 1999.
- Yarmolik, Vyacheslav N.; Hellebrand, Sybille; Wunderlich, Hans-Joachim: Symmetric Transparent BIST for RAMs. In: Proceedings of the 2nd Conference on Design, Automation and Test in Europe (DATE), Munich, Germany, March 9-12, 1999.
Jahrgang 1998
- Dorsch, Rainer; Wunderlich, Hans-Joachim: Accumulator Based Deterministic BIST. In: Proceedings of the 29th IEEE International Test Conference (ITC), Washington, DC, October 1998.
- Hertwig, Andre; Hellebrand, Sybille; Wunderlich, Hans-Joachim: Fast Self-Recovering Controllers. In: Proceedings of the 16th IEEE VLSI Test Symposium (VTS), Monterey, CA, April 1998.
- Karkal, Madhavi; Touba, Nur A.; Wunderlich, Hans-Joachim: Special ATPG to Correlate Test Patterns for Low-Overhead Mixed-Mode BIST. In: Proceedings of the 7th Asian Test Symposium (ATS), Singapore, December 2-4, 1998.
- Kiefer, Gundolf; Wunderlich, Hans-Joachim: Deterministic BIST with Multiple Scan Chains. In: Proceedings of the 29th IEEE International Test Conference (ITC), Washington, DC, October 1998.
- Yarmolik, Vyacheslav N.; Hellebrand, Sybille; Wunderlich, Hans-Joachim: Self-Adjusting Output Data Compression: An Efficient BIST Technique for RAMs. In: Proceedings of the 1st Conference on Design, Automation and Test in Europe (DATE), Paris, France,February 1998.
- Yarmolik, Vyacheslav N.; Klimets, Yuri; Hellebrand, Sybille; Wunderlich, Hans-Joachim: New Transparent RAM BIST Based on Self-Adjusting Output Data Compression. In: Proceedings of Design & Diagnostics of Electronic Circuits & Systems (DDECS), Szczyrk, Poland, September 1998.
Jahrgang 1997
- Hertwig, Andre; Wunderlich, Hans-Joachim: Fast Controllers for Data Dominated Applications. In: Proceedings of the European Design & Test Conference (ED&TC), Paris, France, March 1997.
- Kiefer, Gundolf; Wunderlich, Hans-Joachim: Using BIST Conitrol for Pattern Generation. In: Proc. of the 28th IEEE International Test Conference (ITC), Washington, DC, November 1997.
Jahrgang 1996