- B.0 GENERAL
- B.1 CONTROL STRUCTURES AND MICROPROGRAMMING
(see also D.3.2)
- B.1.0 General
- B.1.1 Control Design Styles
*Hardwired control*(retired since 1998)*Microprogrammed logic arrays*(retired since 1998)*Writable control store*(retired since 1998)

- B.1.2 Control Structure Performance Analysis and Design Aids
*Automatic synthesis*(retired since 1998)*Formal models*(retired since 1998)*Simulation*(retired since 1998)

- B.1.3 Control Structure Reliability, Testing, and Fault-Tolerance (retired since 1998)
(see also B.8)
*Diagnostics*(retired since 1998)*Error-checking*(retired since 1998)*Redundant design*(retired since 1998)*Test generation*(retired since 1998)

- B.1.4 Microprogram Design Aids
(see also D.2.2,
D.2.4,
D.3.2,
D.3.4)
*Firmware engineering*(retired since 1998)*Languages and compilers**Machine-independent microcode generation*(retired since 1998)*Optimization*(retired since 1998)*Verification*(retired since 1998)

- B.1.5 Microcode Applications
*Direct data manipulation*(retired since 1998)*Firmware support of operating systems/instruction sets*(retired since 1998)*Instruction set interpretation**Peripheral control*(retired since 1998)*Special-purpose*(retired since 1998)

- B.1.m Miscellaneous

- B.2 ARITHMETIC AND LOGIC STRUCTURES
- B.2.0 General
- B.2.1 Design Styles
(see also C.1.1,
C.1.2)
*Calculator*(retired since 1998)*Parallel**Pipeline*

- B.2.2 Performance Analysis and Design Aids (retired since 1998)
(see also B.8)
*Simulation*(retired since 1998)*Verification*(retired since 1998)*Worst-case analysis*(retired since 1998)

- B.2.3 Reliability, Testing, and Fault-Tolerance (retired since 1998)
(see also B.8)
*Diagnostics*(retired since 1998)*Error-checking*(retired since 1998)*Redundant design*(retired since 1998)*Test generation*(retired since 1998)

- B.2.4 High-Speed Arithmetic (new)
*Algorithms*(new)*Cost/performance*(new)

- B.2.m Miscellaneous

- B.3 MEMORY STRUCTURES
- B.3.0 General
- B.3.1 Semiconductor Memories (new)
(see also B.7.1)
*Dynamic memory (DRAM)*(new)*Read-only memory (ROM)*(new)*Static memory (SRAM)*(new)

- B.3.2 Design Styles
(see also D.4.2)
*Associative memories**Cache memories**Interleaved memories*(retired since 1998)*Mass storage (e.g., magnetic, optical, RAID)*(revised 1998)*Primary memory**Sequential-access memory*(retired since 1998)*Shared memory**Virtual memory*

- B.3.3 Performance Analysis and Design Aids (retired since 1998)
(see also B.8,
C.4)
*Formal models*(retired since 1998)*Simulation*(retired since 1998)*Worst-case analysis*(retired since 1998)

- B.3.4 Reliability, Testing, and Fault-Tolerance (retired since 1998)
(see also B.8)
*Diagnostics*(retired since 1998)*Error-checking*(retired since 1998)*Redundant design*(retired since 1998)*Test generation*(retired since 1998)

- B.3.m Miscellaneous

- B.4 INPUT/OUTPUT AND DATA COMMUNICATIONS
- B.4.0 General
- B.4.1 Data Communications Devices
*Processors*(retired since 1998)*Receivers (e.g., voice, data, image)*(retired since 1998)*Transmitters*(retired since 1998)

- B.4.2 Input/Output Devices
*Channels and controllers**Data terminals and printers**Image display**Voice*

- B.4.3 Interconnections (Subsystems)
*Asynchronous/synchronous operation**Fiber optics**Interfaces**Parallel I/O*(new)*Physical structures (e.g., backplanes, cables, chip carriers)*(retired since 1998)*Topology (e.g., bus, point-to-point)*

- B.4.4 Performance Analysis and Design Aids (retired since 1998)
(see also B.8)
*Formal models*(retired since 1998)*Simulation*(retired since 1998)*Verification*(retired since 1998)*Worst-case analysis*(retired since 1998)

- B.4.5 Reliability, Testing, and Fault-Tolerance (retired since 1998)
(see also B.8)
*Built-in tests*(retired since 1998)*Diagnostics*(retired since 1998)*Error-checking*(retired since 1998)*Hardware reliability*(retired since 1998)*Redundant design*(retired since 1998)*Test generation*(retired since 1998)

- B.4.m Miscellaneous

- B.5 REGISTER-TRANSFER-LEVEL IMPLEMENTATION
- B.5.0 General
- B.5.1 Design
*Arithmetic and logic units**Control design**Data-path design**Memory design**Styles (e.g., parallel, pipeline, special-purpose)*

- B.5.2 Design Aids
*Automatic synthesis*(retired since 1998)*Hardware description languages**Optimization*(retired since 1998)*Simulation*(retired since 1998)*Verification*(retired since 1998)

- B.5.3 Reliability and Testing (retired since 1998)
(see also B.8)
*Built-in tests*(retired since 1998)*Error-checking*(retired since 1998)*Redundant design*(retired since 1998)*Test generation*(retired since 1998)*Testability*(retired since 1998)

- B.5.m Miscellaneous

- B.6 LOGIC DESIGN
- B.6.0 General
- B.6.1 Design Styles
*Cellular arrays and automata**Combinational logic**Logic arrays**Memory control and access*(retired since 1998)*Memory used as logic*(retired since 1998)*Parallel circuits**Sequential circuits*

- B.6.2 Reliability and Testing (retired since 1998)
(see also B.8)
*Built-in tests*(retired since 1998)*Error-checking*(retired since 1998)*Redundant design*(retired since 1998)*Test generation*(retired since 1998)*Testability*(retired since 1998)

- B.6.3 Design Aids
*Automatic synthesis*(retired since 1998)*Hardware description languages**Optimization*(retired since 1998)*Simulation*(retired since 1998)*Switching theory**Verification*(retired since 1998)

- B.6.m Miscellaneous

- B.7 INTEGRATED CIRCUITS
- B.7.0 General
- B.7.1 Types and Design Styles
*Advanced technologies**Algorithms implemented in hardware**Gate arrays**Input/output circuits**Memory technologies**Microprocessors and microcomputers**Standard cells*(retired since 1998)*VLSI (very large scale integration)*

- B.7.2 Design Aids
*Graphics**Layout**Placement and routing**Simulation*(retired since 1998)*Verification*(retired since 1998)

- B.7.3 Reliability and Testing (retired since 1998)
(see also B.8)
*Built-in tests*(retired since 1998)*Error-checking*(retired since 1998)*Redundant design*(retired since 1998)*Test generation*(retired since 1998)*Testability*(retired since 1998)

- B.7.m Miscellaneous

- B.8 PERFORMANCE AND RELIABILITY (new) (see also C.4)
- B.m MISCELLANEOUS
*Design management*